Generally, semiconductor integrated circuits may be classified as digital or analog depending on the signal processing methods they employ. In digital circuits, input and output signals are binary (e.g., ON or OFF). In analog circuits, input and output signals may vary linearly.
In both digital and analog integrated circuits, information is stored as electronic charges in a capacitor. As a result, the capacitance of the capacitor must be constantly maintained, even in the presence of variations of voltage or temperature, to ensure the integrated circuits exhibit normal driving properties.
Against this background, a metal-insulator-metal (MIM) capacitor has been frequently used to store charges, because it has excellent capacitance properties in the face of variations of voltage and temperature. The MIM capacitor may be simultaneously formed by a dual damascene process when forming interconnection lines, as described in Korean Patent Registration No. 10-0424183, U.S. Pat. 6,767,788, and U.S. Pat. No. 6,680,542.
However, the capacitor insulating layer of the conventional MIM capacitor described in Korean Patent Registration No. 10-0424183 exhibits a high disconnection probability, thereby increasing leakage current. This high disconnection probability is due to the vertical profile of a trench formed by the dual damascene process.
Furthermore, the fabrication process of the conventional MIM capacitor described in Korean Patent Registration No. 10-0424183 is complicated, because an additional pad must be formed in the MIM capacitor for applying a bias to the MIM capacitor.